Following the recent requests and feedback from the HMCSim user community, we worked hard over the (balmy) Texas winter to bring quite a few new features to HMCSim. We are now to the point where we are confident that the code and support is in an ALPHA state suitable for public consumption. The code is known to compile and work just fine with several of the included tests. However, there are known corner cases that are not yet shaken out or fully documented. We plan to update these shortly.
Additional features:
- Adds Gen 2.0 device layout and packet format support
- Adds Gen 2.0 256 byte Read/Write packets
- Adds Gen 2.0 atomic operation support
- Adds support for users developing their own “Custom Memory Cube” (aka, CMC) operations
Known bugs/issues:
- The current register format is circa the 1.0 spec. Micron has moved the register specification to a separate document available under NDA. We plan to work with Micron to include the new register spec if at all possible
- Device specification functions have not been fully tested across all possible device types
- CMC functionality is lightly tested, but working (note that this is very new functionality)
- Building the code with 12.5Gbps SERDES in the Makefile.inc may generate issues
We have added more documentation to the official HMCSim page with details regarding pulling & building the original HMCSim-1.0, the 2.0 top-of-tree and the 2.0 development branch source bases. We have also pulled an official alpha release TGZ, which you can find on the official page as well.
As always, please submit questions/comments/bugs to us via email or the official issue page (see the HMCSim page). You can find the CMC tutorial here.